Standard Cell Design Engineer (Yokohama or Osaka, 14, JP)

Standard Cell Design Engineer

Job Description - Define standard cell circuit requirement and complete design from schematic, layout and verification. - Conduct schematic design of deep-submicron CMOS technologies using industrial standard simulation tool, such as Hspice and/or Spectre. - Optimize circuit to achieve best PPA for TSMC technology. - Path finding and innovation of circuit design for leading edge tech nodes. - Sub threshold voltage circuit design for IoT application. - Co-work with layout engineer to Define architecture optimized for speed, power, and EMIR. Qualifications - BCH degree and above in relevant field. - Demonstrable work experience in a similar circuit design role. - In-depth understanding of CMOS circuit robustness and weakness. Capable of circuit optimization based on device behavior of different technology nodes. - Hands-on experience of CAD tools, such as Virtuoso, Hspice, Spectre. Familiar with Perl and/or Python is a plus. - Highly welcome candidates who have less standard cell experience but have good custom design experience (IO, Memory…etc.), working attitude and are self-motivated. - Good command of Japanese. - Strong written and oral communication skills in English is a plus. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

Job Description - Define standard cell circuit requirement and complete design from schematic, layout and verification. - Conduct schematic design of deep-submicron CMOS technologies using industrial standard simulation tool, such as Hspice and/or Spectre. - Optimize circuit to achieve best PPA for TSMC technology. - Path finding and innovation of circuit design for leading edge tech nodes. - Sub threshold voltage circuit design for IoT application. - Co-work with layout engineer to Define architecture optimized for speed, power, and EMIR. Qualifications - BCH degree and above in relevant field. - Demonstrable work experience in a similar circuit design role. - In-depth understanding of CMOS circuit robustness and weakness. Capable of circuit optimization based on device behavior of different technology nodes. - Hands-on experience of CAD tools, such as Virtuoso, Hspice, Spectre. Familiar with Perl and/or Python is a plus. - Highly welcome candidates who have less standard cell experience but have good custom design experience (IO, Memory…etc.), working attitude and are self-motivated. - Good command of Japanese. - Strong written and oral communication skills in English is a plus. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

Job Description - Define standard cell circuit requirement and complete design from schematic, layout and verification. - Conduct schematic design of deep-submicron CMOS technologies using industrial standard simulation tool, such as Hspice and/or Spectre. - Optimize circuit to achieve best PPA for TSMC technology. - Path finding and innovation of circuit design for leading edge tech nodes. - Sub threshold voltage circuit design for IoT application. - Co-work with layout engineer to Define architecture optimized for speed, power, and EMIR. Qualifications - BCH degree and above in relevant field. - Demonstrable work experience in a similar circuit design role. - In-depth understanding of CMOS circuit robustness and weakness. Capable of circuit optimization based on device behavior of different technology nodes. - Hands-on experience of CAD tools, such as Virtuoso, Hspice, Spectre. Familiar with Perl and/or Python is a plus. - Highly welcome candidates who have less standard cell experience but have good custom design experience (IO, Memory…etc.), working attitude and are self-motivated. - Good command of Japanese. - Strong written and oral communication skills in English is a plus. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

Job Description - Define standard cell circuit requirement and complete design from schematic, layout and verification. - Conduct schematic design of deep-submicron CMOS technologies using industrial standard simulation tool, such as Hspice and/or Spectre. - Optimize circuit to achieve best PPA for TSMC technology. - Path finding and innovation of circuit design for leading edge tech nodes. - Sub threshold voltage circuit design for IoT application. - Co-work with layout engineer to Define architecture optimized for speed, power, and EMIR. Qualifications - BCH degree and above in relevant field. - Demonstrable work experience in a similar circuit design role. - In-depth understanding of CMOS circuit robustness and weakness. Capable of circuit optimization based on device behavior of different technology nodes. - Hands-on experience of CAD tools, such as Virtuoso, Hspice, Spectre. Familiar with Perl and/or Python is a plus. - Highly welcome candidates who have less standard cell experience but have good custom design experience (IO, Memory…etc.), working attitude and are self-motivated. - Good command of Japanese. - Strong written and oral communication skills in English is a plus. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

Job Description - Define standard cell circuit requirement and complete design from schematic, layout and verification. - Conduct schematic design of deep-submicron CMOS technologies using industrial standard simulation tool, such as Hspice and/or Spectre. - Optimize circuit to achieve best PPA for TSMC technology. - Path finding and innovation of circuit design for leading edge tech nodes. - Sub threshold voltage circuit design for IoT application. - Co-work with layout engineer to Define architecture optimized for speed, power, and EMIR. Qualifications - BCH degree and above in relevant field. - Demonstrable work experience in a similar circuit design role. - In-depth understanding of CMOS circuit robustness and weakness. Capable of circuit optimization based on device behavior of different technology nodes. - Hands-on experience of CAD tools, such as Virtuoso, Hspice, Spectre. Familiar with Perl and/or Python is a plus. - Highly welcome candidates who have less standard cell experience but have good custom design experience (IO, Memory…etc.), working attitude and are self-motivated. - Good command of Japanese. - Strong written and oral communication skills in English is a plus. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

Job Description - Define standard cell circuit requirement and complete design from schematic, layout and verification. - Conduct schematic design of deep-submicron CMOS technologies using industrial standard simulation tool, such as Hspice and/or Spectre. - Optimize circuit to achieve best PPA for TSMC technology. - Path finding and innovation of circuit design for leading edge tech nodes. - Sub threshold voltage circuit design for IoT application. - Co-work with layout engineer to Define architecture optimized for speed, power, and EMIR. Qualifications - BCH degree and above in relevant field. - Demonstrable work experience in a similar circuit design role. - In-depth understanding of CMOS circuit robustness and weakness. Capable of circuit optimization based on device behavior of different technology nodes. - Hands-on experience of CAD tools, such as Virtuoso, Hspice, Spectre. Familiar with Perl and/or Python is a plus. - Highly welcome candidates who have less standard cell experience but have good custom design experience (IO, Memory…etc.), working attitude and are self-motivated. - Good command of Japanese. - Strong written and oral communication skills in English is a plus. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

Job Description

- Define standard cell circuit requirement and complete design from schematic, layout and verification. - Conduct schematic design of deep-submicron CMOS technologies using industrial standard simulation tool, such as Hspice and/or Spectre. - Optimize circuit to achieve best PPA for TSMC technology. - Path finding and innovation of circuit design for leading edge tech nodes. - Sub threshold voltage circuit design for IoT application. - Co-work with layout engineer to Define architecture optimized for speed, power, and EMIR.