Senior Physical Design Engineer

NXP SemiconductorsPunefull timeSenior

ActiveVerified 3h ago

Job description

Job Title: Senior Physical Design Engineer

Location

Pune / Bangalore / Hyderabad (Hybrid)

Experience

8-10 Years

Job Summary

We are seeking a highly motivated and experienced Senior Physical Design Engineer to join our VLSI Physical Design team. The candidate will be responsible for delivering high-quality physical implementation of complex SoC/IP blocks from netlist to GDSII, ensuring timing, power, area, and reliability targets are met. The ideal candidate should have hands-on expertise in advanced node design implementation and signoff methodologies.

Key Responsibilities

Own end-to-end physical design implementation of complex digital blocks/subsystems.
Drive floorplanning, power planning, placement, CTS, routing, timing closure, and physical verification.
Perform design optimization for PPA (Power, Performance, Area) targets.
Execute timing closure across multiple operating modes and process corners.
Analyze and resolve setup, hold, SI, IR-drop, EM, and congestion issues.
Collaborate with RTL, Synthesis, DFT, STA, Package, and Signoff teams to achieve project milestones.
Support ECO implementation and tapeout activities.
Develop and enhance PD methodologies, automation flows, and scripts to improve productivity.
Review design quality and mentor junior engineers.
Work closely with global cross-functional teams.

Required Technical Skills

Strong expertise in:
- Floorplanning
- Power Planning
- Placement Optimization
- Clock Tree Synthesis (CTS)
- Routing
- Timing Closure
- Physical Verification

STA & Signoff

In-depth knowledge of:
- Static Timing Analysis (STA)
- Multi-Mode Multi-Corner (MMMC) methodologies
- Crosstalk/SI Analysis
- ECO Flows
- Timing Signoff