Semiconductor Principal Design Engineer, Non‑Volatile Engineering Group

Req. ID: JR91784 Semiconductor Principal Design Engineer, Non‑Volatile Engineering Group Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Principal Design Engineer in Micron’s NVEG (Non‑Volatile Engineering Group) organization will own and evolve the timing-critical circuitry between the NAND array and page buffer. This role is for a designer who is equally strong in architecture, transistor-level implementation, and physical aware timing closure – and who can lead technical direction across teams to deliver robust, scalable datapath solutions. You will drive designs that directly impact throughput, timing margin, power and yield, partnering closely with page buffer, array device, clocking, physical design, test, and product teams. Responsibilities * Own internal NAND datapath circuits including array redundancy circuits, wave pipeline / pulse based datapath arctitechture and data line sensing circuits. Define scalable datapath architecture supporting multi-plane and high-parallelism operation. * Define and analyse clock/data timing schemes for long interconnects and large-array topologies. Lead timing adjustment and skew management strategy. * Drive layout-aware circuit design with attention to: matching/symmetry for sensing paths, shielding/guarding for sensitive nodes. Parasitic-aware sizing and RC-driven timing closure. Array pitch constraints, blockages and repeatable layout templates. Partner tightly with layout to review critical routes and implement practical fixes. * Perform SPICE/Fast-SPICE simulations across PVT, aging and variability via Monte Carlo. Define characterization structures and debug plans to correlate silicon behavior vs. simulation. Drive root-cause analysis for margin/yield issues tied to datapath timing, redundancy paths or sensing robustness. * Lead design reviews and unblock partners with clear technical decisions. Mentor other engineers; create reusable design collateral (checklists, templates, signoff methodology). Communicate tradeoffs effectively (PPA, margin, schedule, risk) and propose mitigation plans * Communicate with project integration and other functional teams in design on specifications of major block interfaces Minimum Qualifications * BS or MS in Electrical Engineering with 8+ years of relevant experience * Experience in physical design flows and optimization * Proven ownership of blocks from concept -> design -> layout -> signoff -> silicon correlation, * Deep expertise in: * CMOS analog/mixed-signal circuit design and device physics fundamentals * High-speed datapath timing analysis (including nontraditional timing such as wave-pipelined/pulse-based) * Layout parasitics and physical implementation impact on circuit behavior * Strong simulation and debug skills (SPICE/Fast-SPICE, corner/MC analysis, failure-mode thinking) * Experience with managing complex design projects, effectively communicating progress and outcomes Preferred Qualifications * Direct experience in NAND datapath and/or DRAM datapath design. * Wave-pipelining, self-timed, or pulse-latched pipeline design techniques * Redundancy/repair architecture experience in dense arrays (including repair timing implications) * Experience on DRAM interface(e.g. DDR4/5, LPDDR5/6, HBM3/3E/4) as well as other industry standard interfaces. * Comprehensive understanding on CMOS device and device reliability Job Profile(s): Semiconductor Design Engineer 5 Relocation level: (TBD) Before Getting Started Please review Micron’s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence. * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process. ​​​​ As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.