Job description
Lead resolution of complex system-level challenges spanning virtual platforms, firmware, silicon architecture, validation infrastructure, software enablement, and hybrid execution environments. Define architectural direction for SystemC/TLM-based virtual platforms supporting multiple generations of Azure silicon. Identify technical risks, technology gaps, and scaling challenges across programs, then drive practical solutions that can be adopted by multiple teams. Establish engineering standards, modeling practices, reusable frameworks, debug strategies, and validation approaches that improve quality and reduce duplicated effort. Minimum Qualifiations: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience These requirements include, but are not limited to, the following specialized security screenings: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years technical engineering experience with coding, OR Master s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years technical engineering experience with coding, OR Bachelor s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 12+ years technical engineering experience with coding, OR equivalent experience. 3+ years experience leading technical projects beginning-to-end. Experience with SystemC and TLM-2.0 modeling. Experience with Synopsys Virtualizer, Arm Fast Models, Cadence Helium, or similar virtual platform technologies. Experience developing or debugging firmware, bootloaders, device drivers, platform software, PCIe firmware, UEFI, Windows Boot, Linux Boot, or silicon bring-up activities. Experience with SoC architecture, interconnects, IP integration, PCIe, USB, memory subsystems, boot flows, or platform services. Experience optimizing simulation performance, scalability, and debug productivity in simulation or system environments. Experience with hybrid, emulation, or prototyping environments including ZeBu, HAPS, Palladium, Protium, or similar platforms. Experience defining reusable platform architecture, modeling frameworks, reusable IP libraries, or engineering standards across multiple programs. Demonstrated ability to solve ambiguous, high-impact technical problems and influence technical direction across organizations without direct authority. Strong intuition for hardware/software interactions, system performance bottlenecks, and practical engineering tradeoffs. Passion for mentoring engineers, transferring knowledge, and building organizational capability beyond a single project. Experience developing complex software systems using C/C++. Experience in firmware, systems software, silicon development, virtual platforms, or pre-silicon development environments. Experience working across hardware, firmware, and software boundaries. Experience leading technical projects from architecture through delivery. Strong debugging, root-cause analysis, and technical problem-solving skills. Work across multiple silicon programs as a shared technical leader and subject matter expert. Design and develop SystemC/TLM-2.0 models for complex SoC subsystems including PCIe, memory, boot infrastructure, compute clusters, interconnect, and platform services. Develop and debug low-level firmware and validation software running on virtual platforms. Support firmware bring-up activities including UEFI, Windows Boot, PCIe initialization, platform enumeration, early driver enablement, and operating system integration. Analyze and optimize simulation performance, scalability, usability, and debug productivity across large SoC and multi-SoC environments. Contribute to architectural integration of virtual platforms with emulation and prototyping systems including ZeBu, HAPS, Helium, Palladium, and Protium. Build organizational capability by enabling junior and senior engineers to understand, maintain, and extend solutions after initial architecture direction is established.